1. Field of the Invention
The present invention relates to a nonvolatile latch circuit and a nonvolatile flip-flop circuit.
2. Related Art
As the transistors become finer, not only the sub-threshold leak current but also the gate leak current increases and power dissipation caused by these leak currents occupies the greater part of the total power dissipation of the LSI. As for lowered powered dissipation at the circuit and system level, a technique of lowering the drive voltage and lowering the operation frequency as a basic principle has been proposed (see, for example, LongRun (January 2000) http://www.transmeta. com/index.html).
Aiming at further lowered power dissipation, a technique of dividing an LSI into several circuit blocks and intercepting power supply to blocks which are not in operation is proposed (see, for example, Shimizu, T.; Arakawa, F.; Kawahara, T.; VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on 14-16 Jun. 2001 Pages 55-56). Since this proposal cannot intercept the power supply for a block which is required to retain data, however, there is a problem that blocks to which the technique can be applied are restricted.
On the other hand, a technique of incorporating ferroelectric capacitors into a sequential circuit such as a flip-flop to form a nonvolatile sequential circuit is proposed (see, for example, JP-A 2000-124776, or Fujimori, Y.; Nakamura, T.; Takasu, H.; Technical Report of IEICE. ICD2002-10 Pages: 13-18). This nonvolatile sequential circuit stores data of 0 and 1 as a difference of remanent dielectric polarization of a ferroelectric capacitor before interception of the power supply. Even if the power supply is intercepted, the data is retained and the data can be read out after the power supply is connected again. If such a nonvolatile sequential circuit can be realized, the power supply can be intercepted inclusive of the sequential circuit at the time of non-operation and consequently a dramatic reduction of power dissipation can be anticipated. However, the nonvolatile sequential circuit has a problem of scalability that making the circuit fine reduces the readout margin because ferroelectric capacitors are used in storage elements.
Furthermore, in recent years, study of various nonvolatile memory elements using new materials and having a feature that the elements have two terminals and a silicon single crystal substrate is not needed is vigorously promoted. It is considered that those nonvolatile memory elements are small-sized and they can be incorporated into the wiring layer portion. Implementation of a small sized nonvolatile latch circuit using the nonvolatile memory element is proposed (see, for example, Keiko Abe, Shinobu Fujita, and Thomas H. Lee, EUROPEAN MICRO AND NANO SYSTEMS 2204, or U.S. Patent No. 2006/0083047). In Keiko Abe, Shinobu Fujita, and Thomas H. Lee, EUROPEAN MICRO AND NANO SYSTEMS 2004, a spin injection type MTJ (Magnetic Tunnel Junction) element which is excellent in scalability and high in endurance is mentioned as the nonvolatile memory element used for the nonvolatile latch.
When two nonvolatile latch circuits are connected to form a flip-flop, data is written into the storage element every clock period. If it is attempted to operate the flip-flop at an operation frequency of 1 GHz, the storage element is required to have high endurance amounting to 8.64×1013 times a day. A nonvolatile latch circuit capable of satisfying such high endurance is not known.